85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
#include <stdint.h>
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#include "system.h"
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static uint32_t master_clock = 0;
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/** Use TIM4_CH4, which is linked to PD15 AF1 **/
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int pwm_init(uint32_t clock, uint32_t threshold)
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{
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uint32_t val = (clock / 100000); /* Frequency is 100 KHz */
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uint32_t lvl;
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master_clock = clock;
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if (threshold > 100)
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return -1;
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lvl = (val * threshold) / 100;
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if (lvl != 0)
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lvl--;
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APB1_CLOCK_RST |= TIM4_APB1_CLOCK_ER_VAL;
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__asm__ volatile ("dmb");
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APB1_CLOCK_RST &= ~TIM4_APB1_CLOCK_ER_VAL;
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APB1_CLOCK_ER |= TIM4_APB1_CLOCK_ER_VAL;
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/* disable CC */
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TIM4_CCER &= ~TIM_CCER_CC4_ENABLE;
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TIM4_CR1 = 0;
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TIM4_PSC = 0;
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TIM4_ARR = val - 1;
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TIM4_CCR4 = lvl;
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TIM4_CCMR1 &= ~(0x03 << 0);
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TIM4_CCMR1 &= ~(0x07 << 4);
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TIM4_CCMR1 |= TIM_CCMR1_OC1M_PWM1;
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TIM4_CCMR2 &= ~(0x03 << 8);
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TIM4_CCMR2 &= ~(0x07 << 12);
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TIM4_CCMR2 |= TIM_CCMR2_OC4M_PWM1;
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TIM4_CCER |= TIM_CCER_CC4_ENABLE;
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TIM4_CR1 |= TIM_CR1_CLOCK_ENABLE | TIM_CR1_ARPE;
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__asm__ volatile ("dmb");
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return 0;
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}
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/* Timer 2: Use val 60000 with PSC 1400 for 1s tick (84 Mhz) */
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/* Timer 2: Use val 52500 with PSC 200 for 1/8 s tick (84 Mhz) */
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#define TMR2_INIT_VAL 52500
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#define TMR2_INIT_PSC 200
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void timer_init(void)
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{
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uint32_t val = 0;
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uint32_t psc = 1;
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uint32_t err = 0;
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nvic_irq_enable(NVIC_TIM2_IRQN);
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nvic_irq_setprio(NVIC_TIM2_IRQN, 0);
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APB1_CLOCK_RST |= TIM2_APB1_CLOCK_ER_VAL;
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__asm__ volatile ("dmb");
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APB1_CLOCK_RST &= ~TIM2_APB1_CLOCK_ER_VAL;
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APB1_CLOCK_ER |= TIM2_APB1_CLOCK_ER_VAL;
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TIM2_CR1 = 0;
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__asm__ volatile ("dmb");
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TIM2_PSC = TMR2_INIT_PSC;
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TIM2_ARR = TMR2_INIT_VAL;
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TIM2_CR1 |= TIM_CR1_CLOCK_ENABLE;
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TIM2_DIER |= TIM_DIER_UIE;
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__asm__ volatile ("dmb");
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}
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static volatile uint32_t tim2_ticks = 0;
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void isr_tim2(void)
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{
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TIM2_SR &= ~TIM_SR_UIF;
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tim2_ticks++;
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}
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void gettime(uint32_t *seconds, uint32_t *microseconds)
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{
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*microseconds = ((TIM2_CNT * TMR2_INIT_PSC) / 84) + (tim2_ticks & 0x07) * 125000;
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*seconds = (tim2_ticks >> 3);
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}
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