gd32vf103_gpio.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503
  1. /*!
  2. \file gd32vf103_gpio.c
  3. \brief GPIO driver
  4. \version 2019-06-05, V1.0.0, firmware for GD32VF103
  5. \version 2020-08-04, V1.1.0, firmware for GD32VF103
  6. */
  7. /*
  8. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #include "gd32vf103_gpio.h"
  31. #define AFIO_EXTI_SOURCE_MASK ((uint8_t)0x03U) /*!< AFIO exti source selection mask*/
  32. #define AFIO_EXTI_SOURCE_FIELDS ((uint8_t)0x04U) /*!< select AFIO exti source registers */
  33. #define LSB_16BIT_MASK ((uint16_t)0xFFFFU) /*!< LSB 16-bit mask */
  34. #define PCF_POSITION_MASK ((uint32_t)0x000F0000U) /*!< AFIO_PCF register position mask */
  35. #define PCF_SWJCFG_MASK ((uint32_t)0xF0FFFFFFU) /*!< AFIO_PCF register SWJCFG mask */
  36. #define PCF_LOCATION1_MASK ((uint32_t)0x00200000U) /*!< AFIO_PCF register location1 mask */
  37. #define PCF_LOCATION2_MASK ((uint32_t)0x00100000U) /*!< AFIO_PCF register location2 mask */
  38. #define AFIO_PCF1_FIELDS ((uint32_t)0x80000000U) /*!< select AFIO_PCF1 register */
  39. #define GPIO_OUTPUT_PORT_OFFSET ((uint32_t)4U) /*!< GPIO event output port offset*/
  40. /*!
  41. \brief reset GPIO port
  42. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  43. \param[out] none
  44. \retval none
  45. */
  46. void gpio_deinit(uint32_t gpio_periph)
  47. {
  48. switch (gpio_periph) {
  49. case GPIOA:
  50. /* reset GPIOA */
  51. rcu_periph_reset_enable(RCU_GPIOARST);
  52. rcu_periph_reset_disable(RCU_GPIOARST);
  53. break;
  54. case GPIOB:
  55. /* reset GPIOB */
  56. rcu_periph_reset_enable(RCU_GPIOBRST);
  57. rcu_periph_reset_disable(RCU_GPIOBRST);
  58. break;
  59. case GPIOC:
  60. /* reset GPIOC */
  61. rcu_periph_reset_enable(RCU_GPIOCRST);
  62. rcu_periph_reset_disable(RCU_GPIOCRST);
  63. break;
  64. case GPIOD:
  65. /* reset GPIOD */
  66. rcu_periph_reset_enable(RCU_GPIODRST);
  67. rcu_periph_reset_disable(RCU_GPIODRST);
  68. break;
  69. case GPIOE:
  70. /* reset GPIOE */
  71. rcu_periph_reset_enable(RCU_GPIOERST);
  72. rcu_periph_reset_disable(RCU_GPIOERST);
  73. break;
  74. default:
  75. break;
  76. }
  77. }
  78. /*!
  79. \brief reset alternate function I/O(AFIO)
  80. \param[in] none
  81. \param[out] none
  82. \retval none
  83. */
  84. void gpio_afio_deinit(void)
  85. {
  86. rcu_periph_reset_enable(RCU_AFRST);
  87. rcu_periph_reset_disable(RCU_AFRST);
  88. }
  89. /*!
  90. \brief GPIO parameter initialization
  91. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  92. \param[in] mode: gpio pin mode
  93. only one parameter can be selected which is shown as below:
  94. \arg GPIO_MODE_AIN: analog input mode
  95. \arg GPIO_MODE_IN_FLOATING: floating input mode
  96. \arg GPIO_MODE_IPD: pull-down input mode
  97. \arg GPIO_MODE_IPU: pull-up input mode
  98. \arg GPIO_MODE_OUT_OD: GPIO output with open-drain
  99. \arg GPIO_MODE_OUT_PP: GPIO output with push-pull
  100. \arg GPIO_MODE_AF_OD: AFIO output with open-drain
  101. \arg GPIO_MODE_AF_PP: AFIO output with push-pull
  102. \param[in] speed: gpio output max speed value
  103. only one parameter can be selected which is shown as below:
  104. \arg GPIO_OSPEED_10MHZ: output max speed 10MHz
  105. \arg GPIO_OSPEED_2MHZ: output max speed 2MHz
  106. \arg GPIO_OSPEED_50MHZ: output max speed 50MHz
  107. \param[in] pin: GPIO pin
  108. one or more parameters can be selected which are shown as below:
  109. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  110. \param[out] none
  111. \retval none
  112. */
  113. void gpio_init(uint32_t gpio_periph, uint32_t mode, uint32_t speed,
  114. uint32_t pin)
  115. {
  116. uint16_t i;
  117. uint32_t temp_mode = 0U;
  118. uint32_t reg = 0U;
  119. /* GPIO mode configuration */
  120. temp_mode = (uint32_t) (mode & ((uint32_t) 0x0FU));
  121. /* GPIO speed configuration */
  122. if (((uint32_t) 0x00U) != ((uint32_t) mode & ((uint32_t) 0x10U))) {
  123. /* output mode max speed:10MHz,2MHz,50MHz */
  124. temp_mode |= (uint32_t) speed;
  125. }
  126. /* configure the eight low port pins with GPIO_CTL0 */
  127. for (i = 0U; i < 8U; i++) {
  128. if ((1U << i) & pin) {
  129. reg = GPIO_CTL0(gpio_periph);
  130. /* clear the specified pin mode bits */
  131. reg &= ~GPIO_MODE_MASK(i);
  132. /* set the specified pin mode bits */
  133. reg |= GPIO_MODE_SET(i, temp_mode);
  134. /* set IPD or IPU */
  135. if (GPIO_MODE_IPD == mode) {
  136. /* reset the corresponding OCTL bit */
  137. GPIO_BC(gpio_periph) = (uint32_t) ((1U << i) & pin);
  138. } else {
  139. /* set the corresponding OCTL bit */
  140. if (GPIO_MODE_IPU == mode) {
  141. GPIO_BOP(gpio_periph) = (uint32_t) ((1U << i) & pin);
  142. }
  143. }
  144. /* set GPIO_CTL0 register */
  145. GPIO_CTL0(gpio_periph) = reg;
  146. }
  147. }
  148. /* configure the eight high port pins with GPIO_CTL1 */
  149. for (i = 8U; i < 16U; i++) {
  150. if ((1U << i) & pin) {
  151. reg = GPIO_CTL1(gpio_periph);
  152. /* clear the specified pin mode bits */
  153. reg &= ~GPIO_MODE_MASK(i - 8U);
  154. /* set the specified pin mode bits */
  155. reg |= GPIO_MODE_SET(i - 8U, temp_mode);
  156. /* set IPD or IPU */
  157. if (GPIO_MODE_IPD == mode) {
  158. /* reset the corresponding OCTL bit */
  159. GPIO_BC(gpio_periph) = (uint32_t) ((1U << i) & pin);
  160. } else {
  161. /* set the corresponding OCTL bit */
  162. if (GPIO_MODE_IPU == mode) {
  163. GPIO_BOP(gpio_periph) = (uint32_t) ((1U << i) & pin);
  164. }
  165. }
  166. /* set GPIO_CTL1 register */
  167. GPIO_CTL1(gpio_periph) = reg;
  168. }
  169. }
  170. }
  171. /*!
  172. \brief set GPIO pin
  173. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  174. \param[in] pin: GPIO pin
  175. one or more parameters can be selected which are shown as below:
  176. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  177. \param[out] none
  178. \retval none
  179. */
  180. void gpio_bit_set(uint32_t gpio_periph, uint32_t pin)
  181. {
  182. GPIO_BOP(gpio_periph) = (uint32_t) pin;
  183. }
  184. /*!
  185. \brief reset GPIO pin
  186. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  187. \param[in] pin: GPIO pin
  188. one or more parameters can be selected which are shown as below:
  189. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  190. \param[out] none
  191. \retval none
  192. */
  193. void gpio_bit_reset(uint32_t gpio_periph, uint32_t pin)
  194. {
  195. GPIO_BC(gpio_periph) = (uint32_t) pin;
  196. }
  197. /*!
  198. \brief write data to the specified GPIO pin
  199. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  200. \param[in] pin: GPIO pin
  201. one or more parameters can be selected which are shown as below:
  202. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  203. \param[in] bit_value: SET or RESET
  204. only one parameter can be selected which is shown as below:
  205. \arg RESET: clear the port pin
  206. \arg SET: set the port pin
  207. \param[out] none
  208. \retval none
  209. */
  210. void gpio_bit_write(uint32_t gpio_periph, uint32_t pin, bit_status bit_value)
  211. {
  212. if (RESET != bit_value) {
  213. GPIO_BOP(gpio_periph) = (uint32_t) pin;
  214. } else {
  215. GPIO_BC(gpio_periph) = (uint32_t) pin;
  216. }
  217. }
  218. /*!
  219. \brief write data to the specified GPIO port
  220. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  221. \param[in] data: specify the value to be written to the port output data register
  222. \param[out] none
  223. \retval none
  224. */
  225. void gpio_port_write(uint32_t gpio_periph, uint16_t data)
  226. {
  227. GPIO_OCTL(gpio_periph) = (uint32_t) data;
  228. }
  229. /*!
  230. \brief get GPIO pin input status
  231. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  232. \param[in] pin: GPIO pin
  233. only one parameter can be selected which are shown as below:
  234. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  235. \param[out] none
  236. \retval input status of gpio pin: SET or RESET
  237. */
  238. FlagStatus gpio_input_bit_get(uint32_t gpio_periph, uint32_t pin)
  239. {
  240. if ((uint32_t) RESET != (GPIO_ISTAT(gpio_periph) & (pin))) {
  241. return SET;
  242. } else {
  243. return RESET;
  244. }
  245. }
  246. /*!
  247. \brief get GPIO port input status
  248. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  249. \param[out] none
  250. \retval input status of gpio all pins
  251. */
  252. uint16_t gpio_input_port_get(uint32_t gpio_periph)
  253. {
  254. return (uint16_t) (GPIO_ISTAT(gpio_periph));
  255. }
  256. /*!
  257. \brief get GPIO pin output status
  258. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  259. \param[in] pin: GPIO pin
  260. only one parameter can be selected which are shown as below:
  261. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  262. \param[out] none
  263. \retval output status of gpio pin: SET or RESET
  264. */
  265. FlagStatus gpio_output_bit_get(uint32_t gpio_periph, uint32_t pin)
  266. {
  267. if ((uint32_t) RESET != (GPIO_OCTL(gpio_periph) & (pin))) {
  268. return SET;
  269. } else {
  270. return RESET;
  271. }
  272. }
  273. /*!
  274. \brief get GPIO port output status
  275. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  276. \param[out] none
  277. \retval output status of gpio all pins
  278. */
  279. uint16_t gpio_output_port_get(uint32_t gpio_periph)
  280. {
  281. return ((uint16_t) GPIO_OCTL(gpio_periph));
  282. }
  283. /*!
  284. \brief configure GPIO pin remap
  285. \param[in] gpio_remap: select the pin to remap
  286. only one parameter can be selected which are shown as below:
  287. \arg GPIO_SPI0_REMAP: SPI0 remapping
  288. \arg GPIO_I2C0_REMAP: I2C0 remapping
  289. \arg GPIO_USART0_REMAP: USART0 remapping
  290. \arg GPIO_USART1_REMAP: USART1 remapping
  291. \arg GPIO_USART2_PARTIAL_REMAP: USART2 partial remapping
  292. \arg GPIO_USART2_FULL_REMAP: USART2 full remapping
  293. \arg GPIO_TIMER0_PARTIAL_REMAP: TIMER0 partial remapping
  294. \arg GPIO_TIMER0_FULL_REMAP: TIMER0 full remapping
  295. \arg GPIO_TIMER1_PARTIAL_REMAP0: TIMER1 partial remapping
  296. \arg GPIO_TIMER1_PARTIAL_REMAP1: TIMER1 partial remapping
  297. \arg GPIO_TIMER1_FULL_REMAP: TIMER1 full remapping
  298. \arg GPIO_TIMER2_PARTIAL_REMAP: TIMER2 partial remapping
  299. \arg GPIO_TIMER2_FULL_REMAP: TIMER2 full remapping
  300. \arg GPIO_TIMER3_REMAP: TIMER3 remapping
  301. \arg GPIO_CAN0_PARTIAL_REMAP: CAN0 partial remapping
  302. \arg GPIO_CAN0_FULL_REMAP: CAN0 full remapping
  303. \arg GPIO_PD01_REMAP: PD01 remapping
  304. \arg GPIO_TIMER4CH3_IREMAP: TIMER4 channel3 internal remapping
  305. \arg GPIO_CAN1_REMAP: CAN1 remapping
  306. \arg GPIO_SWJ_NONJTRST_REMAP: JTAG-DP,but without NJTRST
  307. \arg GPIO_SWJ_DISABLE_REMAP: JTAG-DP disabled
  308. \arg GPIO_SPI2_REMAP: SPI2 remapping
  309. \arg GPIO_TIMER1ITI1_REMAP: TIMER1 internal trigger 1 remapping
  310. \arg GPIO_EXMC_NADV_REMAP: EXMC_NADV connect/disconnect
  311. \param[in] newvalue: ENABLE or DISABLE
  312. \param[out] none
  313. \retval none
  314. */
  315. void gpio_pin_remap_config(uint32_t remap, ControlStatus newvalue)
  316. {
  317. uint32_t remap1 = 0U, remap2 = 0U, temp_reg = 0U, temp_mask = 0U;
  318. if (AFIO_PCF1_FIELDS == (remap & AFIO_PCF1_FIELDS)) {
  319. /* get AFIO_PCF1 regiter value */
  320. temp_reg = AFIO_PCF1;
  321. } else {
  322. /* get AFIO_PCF0 regiter value */
  323. temp_reg = AFIO_PCF0;
  324. }
  325. temp_mask = (remap & PCF_POSITION_MASK) >> 0x10U;
  326. remap1 = remap & LSB_16BIT_MASK;
  327. /* judge pin remap type */
  328. if ((PCF_LOCATION1_MASK | PCF_LOCATION2_MASK)
  329. == (remap & (PCF_LOCATION1_MASK | PCF_LOCATION2_MASK))) {
  330. temp_reg &= PCF_SWJCFG_MASK;
  331. AFIO_PCF0 &= PCF_SWJCFG_MASK;
  332. } else if (PCF_LOCATION2_MASK == (remap & PCF_LOCATION2_MASK)) {
  333. remap2 = ((uint32_t) 0x03U) << temp_mask;
  334. temp_reg &= ~remap2;
  335. temp_reg |= ~PCF_SWJCFG_MASK;
  336. } else {
  337. temp_reg &= ~(remap1 << ((remap >> 0x15U) * 0x10U));
  338. temp_reg |= ~PCF_SWJCFG_MASK;
  339. }
  340. /* set pin remap value */
  341. if (DISABLE != newvalue) {
  342. temp_reg |= (remap1 << ((remap >> 0x15U) * 0x10U));
  343. }
  344. if (AFIO_PCF1_FIELDS == (remap & AFIO_PCF1_FIELDS)) {
  345. /* set AFIO_PCF1 regiter value */
  346. AFIO_PCF1 = temp_reg;
  347. } else {
  348. /* set AFIO_PCF0 regiter value */
  349. AFIO_PCF0 = temp_reg;
  350. }
  351. }
  352. /*!
  353. \brief select GPIO pin exti sources
  354. \param[in] gpio_outputport: gpio event output port
  355. only one parameter can be selected which are shown as below:
  356. \arg GPIO_PORT_SOURCE_GPIOA: output port source A
  357. \arg GPIO_PORT_SOURCE_GPIOB: output port source B
  358. \arg GPIO_PORT_SOURCE_GPIOC: output port source C
  359. \arg GPIO_PORT_SOURCE_GPIOD: output port source D
  360. \arg GPIO_PORT_SOURCE_GPIOE: output port source E
  361. \param[in] gpio_outputpin: GPIO_PIN_SOURCE_x(x=0..15)
  362. \param[out] none
  363. \retval none
  364. */
  365. void gpio_exti_source_select(uint8_t output_port, uint8_t output_pin)
  366. {
  367. uint32_t source = 0U;
  368. source = ((uint32_t) 0x0FU)
  369. << (AFIO_EXTI_SOURCE_FIELDS * (output_pin & AFIO_EXTI_SOURCE_MASK));
  370. /* select EXTI sources */
  371. if (GPIO_PIN_SOURCE_4 > output_pin) {
  372. /* select EXTI0/EXTI1/EXTI2/EXTI3 */
  373. AFIO_EXTISS0 &= ~source;
  374. AFIO_EXTISS0 |= (((uint32_t) output_port)
  375. << (AFIO_EXTI_SOURCE_FIELDS
  376. * (output_pin & AFIO_EXTI_SOURCE_MASK)));
  377. } else if (GPIO_PIN_SOURCE_8 > output_pin) {
  378. /* select EXTI4/EXTI5/EXTI6/EXTI7 */
  379. AFIO_EXTISS1 &= ~source;
  380. AFIO_EXTISS1 |= (((uint32_t) output_port)
  381. << (AFIO_EXTI_SOURCE_FIELDS
  382. * (output_pin & AFIO_EXTI_SOURCE_MASK)));
  383. } else if (GPIO_PIN_SOURCE_12 > output_pin) {
  384. /* select EXTI8/EXTI9/EXTI10/EXTI11 */
  385. AFIO_EXTISS2 &= ~source;
  386. AFIO_EXTISS2 |= (((uint32_t) output_port)
  387. << (AFIO_EXTI_SOURCE_FIELDS
  388. * (output_pin & AFIO_EXTI_SOURCE_MASK)));
  389. } else {
  390. /* select EXTI12/EXTI13/EXTI14/EXTI15 */
  391. AFIO_EXTISS3 &= ~source;
  392. AFIO_EXTISS3 |= (((uint32_t) output_port)
  393. << (AFIO_EXTI_SOURCE_FIELDS
  394. * (output_pin & AFIO_EXTI_SOURCE_MASK)));
  395. }
  396. }
  397. /*!
  398. \brief configure GPIO pin event output
  399. \param[in] output_port: gpio event output port
  400. only one parameter can be selected which are shown as below:
  401. \arg GPIO_EVENT_PORT_GPIOA: event output port A
  402. \arg GPIO_EVENT_PORT_GPIOB: event output port B
  403. \arg GPIO_EVENT_PORT_GPIOC: event output port C
  404. \arg GPIO_EVENT_PORT_GPIOD: event output port D
  405. \arg GPIO_EVENT_PORT_GPIOE: event output port E
  406. \param[in] output_pin:
  407. only one parameter can be selected which are shown as below:
  408. \arg GPIO_EVENT_PIN_x(x=0..15)
  409. \param[out] none
  410. \retval none
  411. */
  412. void gpio_event_output_config(uint8_t output_port, uint8_t output_pin)
  413. {
  414. uint32_t reg = 0U;
  415. reg = AFIO_EC;
  416. /* clear AFIO_EC_PORT and AFIO_EC_PIN bits */
  417. reg &= (uint32_t) (~(AFIO_EC_PORT | AFIO_EC_PIN));
  418. reg |= (uint32_t) ((uint32_t) output_port << GPIO_OUTPUT_PORT_OFFSET);
  419. reg |= (uint32_t) output_pin;
  420. AFIO_EC = reg;
  421. }
  422. /*!
  423. \brief enable GPIO pin event output
  424. \param[in] none
  425. \param[out] none
  426. \retval none
  427. */
  428. void gpio_event_output_enable(void)
  429. {
  430. AFIO_EC |= AFIO_EC_EOE;
  431. }
  432. /*!
  433. \brief disable GPIO pin event output
  434. \param[in] none
  435. \param[out] none
  436. \retval none
  437. */
  438. void gpio_event_output_disable(void)
  439. {
  440. AFIO_EC &= (uint32_t) (~AFIO_EC_EOE);
  441. }
  442. /*!
  443. \brief lock GPIO pin
  444. \param[in] gpio_periph: GPIOx(x = A,B,C,D,E)
  445. \param[in] pin: GPIO pin
  446. one or more parameters can be selected which are shown as below:
  447. \arg GPIO_PIN_x(x=0..15), GPIO_PIN_ALL
  448. \param[out] none
  449. \retval none
  450. */
  451. void gpio_pin_lock(uint32_t gpio_periph, uint32_t pin)
  452. {
  453. uint32_t lock = 0x00010000U;
  454. lock |= pin;
  455. /* lock key writing sequence: write 1 -> write 0 -> write 1 -> read 0 -> read 1 */
  456. GPIO_LOCK(gpio_periph) = (uint32_t) lock;
  457. GPIO_LOCK(gpio_periph) = (uint32_t) pin;
  458. GPIO_LOCK(gpio_periph) = (uint32_t) lock;
  459. lock = GPIO_LOCK(gpio_periph);
  460. lock = GPIO_LOCK(gpio_periph);
  461. }