mcp320x.c 9.6 KB

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  1. /*
  2. * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
  3. * Copyright (C) 2014 Rose Technology
  4. * Allan Bendorff Jensen <abj@rosetechnology.dk>
  5. * Soren Andersen <san@rosetechnology.dk>
  6. *
  7. * Driver for following ADC chips from Microchip Technology's:
  8. * 10 Bit converter
  9. * MCP3001
  10. * MCP3002
  11. * MCP3004
  12. * MCP3008
  13. * ------------
  14. * 12 bit converter
  15. * MCP3201
  16. * MCP3202
  17. * MCP3204
  18. * MCP3208
  19. * ------------
  20. *
  21. * Datasheet can be found here:
  22. * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
  23. * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002
  24. * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08
  25. * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201
  26. * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202
  27. * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08
  28. * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301
  29. *
  30. * This program is free software; you can redistribute it and/or modify
  31. * it under the terms of the GNU General Public License version 2 as
  32. * published by the Free Software Foundation.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/delay.h>
  36. #include <linux/spi/spi.h>
  37. #include <linux/module.h>
  38. #include <linux/iio/iio.h>
  39. #include <linux/regulator/consumer.h>
  40. enum {
  41. mcp3001,
  42. mcp3002,
  43. mcp3004,
  44. mcp3008,
  45. mcp3201,
  46. mcp3202,
  47. mcp3204,
  48. mcp3208,
  49. mcp3301,
  50. };
  51. struct mcp320x_chip_info {
  52. const struct iio_chan_spec *channels;
  53. unsigned int num_channels;
  54. unsigned int resolution;
  55. };
  56. struct mcp320x {
  57. struct spi_device *spi;
  58. struct spi_message msg;
  59. struct spi_transfer transfer[2];
  60. struct regulator *reg;
  61. struct mutex lock;
  62. const struct mcp320x_chip_info *chip_info;
  63. u8 tx_buf ____cacheline_aligned;
  64. u8 rx_buf[2];
  65. };
  66. static int mcp320x_channel_to_tx_data(int device_index,
  67. const unsigned int channel, bool differential)
  68. {
  69. int start_bit = 1;
  70. switch (device_index) {
  71. case mcp3001:
  72. case mcp3201:
  73. case mcp3301:
  74. return 0;
  75. case mcp3002:
  76. case mcp3202:
  77. return ((start_bit << 4) | (!differential << 3) |
  78. (channel << 2));
  79. case mcp3004:
  80. case mcp3204:
  81. case mcp3008:
  82. case mcp3208:
  83. return ((start_bit << 6) | (!differential << 5) |
  84. (channel << 2));
  85. default:
  86. return -EINVAL;
  87. }
  88. }
  89. static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
  90. bool differential, int device_index)
  91. {
  92. int ret;
  93. adc->rx_buf[0] = 0;
  94. adc->rx_buf[1] = 0;
  95. adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
  96. channel, differential);
  97. if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
  98. ret = spi_sync(adc->spi, &adc->msg);
  99. if (ret < 0)
  100. return ret;
  101. } else {
  102. ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
  103. if (ret < 0)
  104. return ret;
  105. }
  106. switch (device_index) {
  107. case mcp3001:
  108. return (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
  109. case mcp3002:
  110. case mcp3004:
  111. case mcp3008:
  112. return (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
  113. case mcp3201:
  114. return (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
  115. case mcp3202:
  116. case mcp3204:
  117. case mcp3208:
  118. return (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
  119. case mcp3301:
  120. return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 | adc->rx_buf[1], 12);
  121. default:
  122. return -EINVAL;
  123. }
  124. }
  125. static int mcp320x_read_raw(struct iio_dev *indio_dev,
  126. struct iio_chan_spec const *channel, int *val,
  127. int *val2, long mask)
  128. {
  129. struct mcp320x *adc = iio_priv(indio_dev);
  130. int ret = -EINVAL;
  131. int device_index = 0;
  132. mutex_lock(&adc->lock);
  133. device_index = spi_get_device_id(adc->spi)->driver_data;
  134. switch (mask) {
  135. case IIO_CHAN_INFO_RAW:
  136. ret = mcp320x_adc_conversion(adc, channel->address,
  137. channel->differential, device_index);
  138. if (ret < 0)
  139. goto out;
  140. *val = ret;
  141. ret = IIO_VAL_INT;
  142. break;
  143. case IIO_CHAN_INFO_SCALE:
  144. ret = regulator_get_voltage(adc->reg);
  145. if (ret < 0)
  146. goto out;
  147. /* convert regulator output voltage to mV */
  148. *val = ret / 1000;
  149. *val2 = adc->chip_info->resolution;
  150. ret = IIO_VAL_FRACTIONAL_LOG2;
  151. break;
  152. }
  153. out:
  154. mutex_unlock(&adc->lock);
  155. return ret;
  156. }
  157. #define MCP320X_VOLTAGE_CHANNEL(num) \
  158. { \
  159. .type = IIO_VOLTAGE, \
  160. .indexed = 1, \
  161. .channel = (num), \
  162. .address = (num), \
  163. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  164. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  165. }
  166. #define MCP320X_VOLTAGE_CHANNEL_DIFF(num) \
  167. { \
  168. .type = IIO_VOLTAGE, \
  169. .indexed = 1, \
  170. .channel = (num * 2), \
  171. .channel2 = (num * 2 + 1), \
  172. .address = (num * 2), \
  173. .differential = 1, \
  174. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  175. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  176. }
  177. static const struct iio_chan_spec mcp3201_channels[] = {
  178. MCP320X_VOLTAGE_CHANNEL_DIFF(0),
  179. };
  180. static const struct iio_chan_spec mcp3202_channels[] = {
  181. MCP320X_VOLTAGE_CHANNEL(0),
  182. MCP320X_VOLTAGE_CHANNEL(1),
  183. MCP320X_VOLTAGE_CHANNEL_DIFF(0),
  184. };
  185. static const struct iio_chan_spec mcp3204_channels[] = {
  186. MCP320X_VOLTAGE_CHANNEL(0),
  187. MCP320X_VOLTAGE_CHANNEL(1),
  188. MCP320X_VOLTAGE_CHANNEL(2),
  189. MCP320X_VOLTAGE_CHANNEL(3),
  190. MCP320X_VOLTAGE_CHANNEL_DIFF(0),
  191. MCP320X_VOLTAGE_CHANNEL_DIFF(1),
  192. };
  193. static const struct iio_chan_spec mcp3208_channels[] = {
  194. MCP320X_VOLTAGE_CHANNEL(0),
  195. MCP320X_VOLTAGE_CHANNEL(1),
  196. MCP320X_VOLTAGE_CHANNEL(2),
  197. MCP320X_VOLTAGE_CHANNEL(3),
  198. MCP320X_VOLTAGE_CHANNEL(4),
  199. MCP320X_VOLTAGE_CHANNEL(5),
  200. MCP320X_VOLTAGE_CHANNEL(6),
  201. MCP320X_VOLTAGE_CHANNEL(7),
  202. MCP320X_VOLTAGE_CHANNEL_DIFF(0),
  203. MCP320X_VOLTAGE_CHANNEL_DIFF(1),
  204. MCP320X_VOLTAGE_CHANNEL_DIFF(2),
  205. MCP320X_VOLTAGE_CHANNEL_DIFF(3),
  206. };
  207. static const struct iio_info mcp320x_info = {
  208. .read_raw = mcp320x_read_raw,
  209. .driver_module = THIS_MODULE,
  210. };
  211. static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
  212. [mcp3001] = {
  213. .channels = mcp3201_channels,
  214. .num_channels = ARRAY_SIZE(mcp3201_channels),
  215. .resolution = 10
  216. },
  217. [mcp3002] = {
  218. .channels = mcp3202_channels,
  219. .num_channels = ARRAY_SIZE(mcp3202_channels),
  220. .resolution = 10
  221. },
  222. [mcp3004] = {
  223. .channels = mcp3204_channels,
  224. .num_channels = ARRAY_SIZE(mcp3204_channels),
  225. .resolution = 10
  226. },
  227. [mcp3008] = {
  228. .channels = mcp3208_channels,
  229. .num_channels = ARRAY_SIZE(mcp3208_channels),
  230. .resolution = 10
  231. },
  232. [mcp3201] = {
  233. .channels = mcp3201_channels,
  234. .num_channels = ARRAY_SIZE(mcp3201_channels),
  235. .resolution = 12
  236. },
  237. [mcp3202] = {
  238. .channels = mcp3202_channels,
  239. .num_channels = ARRAY_SIZE(mcp3202_channels),
  240. .resolution = 12
  241. },
  242. [mcp3204] = {
  243. .channels = mcp3204_channels,
  244. .num_channels = ARRAY_SIZE(mcp3204_channels),
  245. .resolution = 12
  246. },
  247. [mcp3208] = {
  248. .channels = mcp3208_channels,
  249. .num_channels = ARRAY_SIZE(mcp3208_channels),
  250. .resolution = 12
  251. },
  252. [mcp3301] = {
  253. .channels = mcp3201_channels,
  254. .num_channels = ARRAY_SIZE(mcp3201_channels),
  255. .resolution = 13
  256. },
  257. };
  258. static int mcp320x_probe(struct spi_device *spi)
  259. {
  260. struct iio_dev *indio_dev;
  261. struct mcp320x *adc;
  262. const struct mcp320x_chip_info *chip_info;
  263. int ret;
  264. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
  265. if (!indio_dev)
  266. return -ENOMEM;
  267. adc = iio_priv(indio_dev);
  268. adc->spi = spi;
  269. indio_dev->dev.parent = &spi->dev;
  270. indio_dev->name = spi_get_device_id(spi)->name;
  271. indio_dev->modes = INDIO_DIRECT_MODE;
  272. indio_dev->info = &mcp320x_info;
  273. chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
  274. indio_dev->channels = chip_info->channels;
  275. indio_dev->num_channels = chip_info->num_channels;
  276. adc->chip_info = chip_info;
  277. adc->transfer[0].tx_buf = &adc->tx_buf;
  278. adc->transfer[0].len = sizeof(adc->tx_buf);
  279. adc->transfer[1].rx_buf = adc->rx_buf;
  280. adc->transfer[1].len = sizeof(adc->rx_buf);
  281. spi_message_init_with_transfers(&adc->msg, adc->transfer,
  282. ARRAY_SIZE(adc->transfer));
  283. adc->reg = devm_regulator_get(&spi->dev, "vref");
  284. if (IS_ERR(adc->reg))
  285. return PTR_ERR(adc->reg);
  286. ret = regulator_enable(adc->reg);
  287. if (ret < 0)
  288. return ret;
  289. mutex_init(&adc->lock);
  290. ret = iio_device_register(indio_dev);
  291. if (ret < 0)
  292. goto reg_disable;
  293. return 0;
  294. reg_disable:
  295. regulator_disable(adc->reg);
  296. return ret;
  297. }
  298. static int mcp320x_remove(struct spi_device *spi)
  299. {
  300. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  301. struct mcp320x *adc = iio_priv(indio_dev);
  302. iio_device_unregister(indio_dev);
  303. regulator_disable(adc->reg);
  304. return 0;
  305. }
  306. #if defined(CONFIG_OF)
  307. static const struct of_device_id mcp320x_dt_ids[] = {
  308. {
  309. .compatible = "mcp3001",
  310. .data = &mcp320x_chip_infos[mcp3001],
  311. }, {
  312. .compatible = "mcp3002",
  313. .data = &mcp320x_chip_infos[mcp3002],
  314. }, {
  315. .compatible = "mcp3004",
  316. .data = &mcp320x_chip_infos[mcp3004],
  317. }, {
  318. .compatible = "mcp3008",
  319. .data = &mcp320x_chip_infos[mcp3008],
  320. }, {
  321. .compatible = "mcp3201",
  322. .data = &mcp320x_chip_infos[mcp3201],
  323. }, {
  324. .compatible = "mcp3202",
  325. .data = &mcp320x_chip_infos[mcp3202],
  326. }, {
  327. .compatible = "mcp3204",
  328. .data = &mcp320x_chip_infos[mcp3204],
  329. }, {
  330. .compatible = "mcp3208",
  331. .data = &mcp320x_chip_infos[mcp3208],
  332. }, {
  333. .compatible = "mcp3301",
  334. .data = &mcp320x_chip_infos[mcp3301],
  335. }, {
  336. }
  337. };
  338. MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
  339. #endif
  340. static const struct spi_device_id mcp320x_id[] = {
  341. { "mcp3001", mcp3001 },
  342. { "mcp3002", mcp3002 },
  343. { "mcp3004", mcp3004 },
  344. { "mcp3008", mcp3008 },
  345. { "mcp3201", mcp3201 },
  346. { "mcp3202", mcp3202 },
  347. { "mcp3204", mcp3204 },
  348. { "mcp3208", mcp3208 },
  349. { "mcp3301", mcp3301 },
  350. { }
  351. };
  352. MODULE_DEVICE_TABLE(spi, mcp320x_id);
  353. static struct spi_driver mcp320x_driver = {
  354. .driver = {
  355. .name = "mcp320x",
  356. .of_match_table = of_match_ptr(mcp320x_dt_ids),
  357. },
  358. .probe = mcp320x_probe,
  359. .remove = mcp320x_remove,
  360. .id_table = mcp320x_id,
  361. };
  362. module_spi_driver(mcp320x_driver);
  363. MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
  364. MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
  365. MODULE_LICENSE("GPL v2");