285 lines
6 KiB
C
285 lines
6 KiB
C
/* spi_flash.c
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*
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* Generic implementation of the read/write/erase
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* functionalities, on top of the spi_drv.h HAL.
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*
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* this is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* this software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include "spi_drv.h"
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#include "spi_flash.h"
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#define JEDEC_ID 0x9F
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#define MDID 0x90
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#define RDSR 0x05
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#define WRSR 0x01
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# define ST_BUSY (1 << 0)
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# define ST_WEL (1 << 1)
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# define ST_BP0 (1 << 2)
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# define ST_BP1 (1 << 3)
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# define ST_BP2 (1 << 4)
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# define ST_BP3 (1 << 5)
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# define ST_AAI (1 << 6)
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# define ST_BRO (1 << 7)
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#define WREN 0x06
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#define WRDI 0x04
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#define SECTOR_ERASE 0x20
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#define BYTE_READ 0x03
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#define BYTE_WRITE 0x02
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#define AUTOINC 0xAD
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#define EWSR 0x50
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#define EBSY 0x70
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#define DBSY 0x80
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static enum write_mode {
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WB_WRITEPAGE = 0x00,
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SST_SINGLEBYTE = 0x01
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} chip_write_mode = WB_WRITEPAGE;
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static void write_address(uint32_t address)
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{
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spi_write((address & 0xFF0000) >> 16);
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spi_read();
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spi_write((address & 0xFF00) >> 8);
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spi_read();
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spi_write((address & 0xFF));
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spi_read();
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}
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static uint8_t read_status(void)
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{
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uint8_t status;
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spi_cs_on();
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spi_write(RDSR);
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spi_read();
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spi_write(0xFF);
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status = spi_read();
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spi_cs_off();
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return status;
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}
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static void spi_cmd(uint8_t cmd)
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{
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spi_cs_on();
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spi_write(cmd);
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spi_read();
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spi_cs_off();
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}
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static void flash_write_enable(void)
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{
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uint8_t status;
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do {
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spi_cmd(WREN);
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status = read_status();
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} while ((status & ST_WEL) == 0);
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}
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static void flash_write_disable(void)
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{
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uint8_t status;
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spi_cmd(WRDI);
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}
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static void wait_busy(void)
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{
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volatile uint8_t status;
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do {
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status = read_status();
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} while(status & ST_BUSY);
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}
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static int spi_flash_write_page(uint32_t address, const void *data, int len)
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{
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const uint8_t *buf = data;
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int j = 0;
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while (len > 0) {
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wait_busy();
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flash_write_enable();
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wait_busy();
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spi_cs_on();
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spi_write(BYTE_WRITE);
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spi_read();
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write_address(address);
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do {
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spi_write(buf[j++]);
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address++;
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spi_read();
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len--;
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} while ((len > 0) && (address & (SPI_FLASH_PAGE_SIZE - 1)) != 0);
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spi_cs_off();
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}
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wait_busy();
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return j;
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}
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static int spi_flash_write_sb(uint32_t address, const void *data, int len)
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{
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const uint8_t *buf = data;
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const uint8_t verify;
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int j = 0;
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wait_busy();
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if (len < 1)
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return -1;
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while (len > 0) {
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flash_write_enable();
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spi_cs_on();
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spi_write(BYTE_WRITE);
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spi_read();
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write_address(address);
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spi_write(buf[j]);
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spi_read();
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spi_cs_off();
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wait_busy();
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spi_flash_read(address, (uint8_t *)&verify, 1);
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if ((verify & ~(buf[j])) == 0) {
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if (verify != buf[j])
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return -1;
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j++;
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len--;
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address++;
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}
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wait_busy();
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}
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return 0;
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}
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/* --- */
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static uint8_t manuf = 0, type = 0, capacity = 0;
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uint32_t get_flash_size(void) {
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uint32_t flash_size = 65536; // Default: 32MB
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if (capacity == 0x8E)
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flash_size = 8192; // 4MB
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if (manuf == 0xEF && type == 0x40 && capacity == 0x16)
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flash_size = 8192; // 4MB
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return flash_size;
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}
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uint8_t get_flash_manuf(void)
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{
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return manuf;
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}
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uint8_t get_flash_type(void)
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{
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return type;
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}
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uint8_t get_flash_capacity(void)
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{
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return capacity;
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}
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uint32_t spi_flash_probe(void)
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{
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uint8_t b0;
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int i;
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spi_init(0,0);
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wait_busy();
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/*
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spi_cs_on();
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spi_write(MDID);
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b0 = spi_read();
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write_address(0);
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spi_write(0xFF);
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manuf = spi_read();
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spi_write(0xFF);
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product = spi_read();
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spi_cs_off();
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*/
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spi_cs_on();
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spi_write(JEDEC_ID);
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spi_read();
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spi_write(0xFF);
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manuf = spi_read();
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spi_write(0xFF);
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type = spi_read();
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spi_write(0xFF);
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capacity = spi_read();
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spi_cs_off();
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if (type == 0x25)
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chip_write_mode = SST_SINGLEBYTE;
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if (manuf == 0xEF)
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chip_write_mode = WB_WRITEPAGE;
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if (manuf != 0xBF){
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while(1) {
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}
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}
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#ifndef READONLY
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spi_cmd(EWSR);
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spi_cs_on();
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spi_write(WRSR);
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spi_read();
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spi_write(0x00);
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spi_read();
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spi_cs_off();
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#endif
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return (uint32_t)((manuf << 16) |( type << 8) | (capacity));
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}
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void spi_flash_sector_erase(uint32_t address)
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{
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uint8_t status;
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address &= (~(SPI_FLASH_SECTOR_SIZE - 1));
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wait_busy();
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flash_write_enable();
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spi_cs_on();
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spi_write(SECTOR_ERASE);
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spi_read();
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write_address(address);
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spi_cs_off();
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wait_busy();
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}
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int spi_flash_read(uint32_t address, void *data, int len)
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{
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uint8_t *buf = data;
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int i = 0;
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wait_busy();
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spi_cs_on();
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spi_write(BYTE_READ);
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spi_read();
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write_address(address);
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while (len > 0) {
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spi_write(0xFF);
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buf[i++] = spi_read();
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len--;
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}
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spi_cs_off();
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return i;
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}
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int spi_flash_write(uint32_t address, const void *data, int len)
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{
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if (chip_write_mode == SST_SINGLEBYTE)
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return spi_flash_write_sb(address, data, len);
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if (chip_write_mode == WB_WRITEPAGE)
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return spi_flash_write_page(address, data, len);
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return -1;
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}
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