968 lines
21 KiB
YAML
968 lines
21 KiB
YAML
!!omap
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- SDIO_CTRL:
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fields: !!omap
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- CONTROLLER_RESET:
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access: rw
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description: Controller reset
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lsb: 0
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reset_value: '0'
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width: 1
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- FIFO_RESET:
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access: rw
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description: FIFO reset
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lsb: 1
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reset_value: '0'
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width: 1
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- DMA_RESET:
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access: rw
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description: DMA reset
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lsb: 2
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reset_value: '0'
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width: 1
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- INT_ENABLE:
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access: rw
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description: Global interrupt enable/disable
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lsb: 4
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reset_value: '0'
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width: 1
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- READ_WAIT:
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access: rw
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description: Read/wait send
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lsb: 6
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reset_value: '0'
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width: 1
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- SEND_IRQ_RESPONSE:
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access: rw
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description: Send IRQ response
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lsb: 7
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reset_value: '0'
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width: 1
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- ABORT_READ_DATA:
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access: rw
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description: Abort read data
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lsb: 8
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reset_value: '0'
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width: 1
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- SEND_CCSD:
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access: rw
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description: Send CCSD
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lsb: 9
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reset_value: '0'
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width: 1
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- SEND_AUTO_STOP_CCSD:
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access: rw
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description: Send auto stop CCSD
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lsb: 10
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reset_value: '0'
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width: 1
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- CEATA_DEVICE_INTERRUPT_STATUS:
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access: rw
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description: CEATA device interrupt status
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lsb: 11
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reset_value: '0'
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width: 1
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- CARD_VOLTAGE_A0:
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access: rw
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description: SD_VOLT0 pin control
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lsb: 16
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reset_value: '0'
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width: 1
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- CARD_VOLTAGE_A1:
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access: rw
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description: SD_VOLT1 pin control
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lsb: 17
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reset_value: '0'
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width: 1
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- CARD_VOLTAGE_A2:
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access: rw
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description: SD_VOLT2 pin control
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lsb: 18
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reset_value: '0'
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width: 1
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- USE_INTERNAL_DMAC:
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access: rw
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description: SD/MMC DMA use
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lsb: 25
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reset_value: '0'
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width: 1
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- SDIO_PWREN:
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fields: !!omap
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- POWER_ENABLE:
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access: rw
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description: Power on/off switch for card
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lsb: 0
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reset_value: '0'
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width: 1
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- SDIO_CLKDIV:
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fields: !!omap
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- CLK_DIVIDER0:
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access: rw
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description: Clock divider-0 value
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lsb: 0
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reset_value: '0'
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width: 8
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- CLK_DIVIDER1:
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access: rw
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description: Clock divider-1 value
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lsb: 8
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reset_value: '0'
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width: 8
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- CLK_DIVIDER2:
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access: rw
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description: Clock divider-2 value
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lsb: 16
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reset_value: '0'
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width: 8
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- CLK_DIVIDER3:
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access: rw
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description: Clock divider-3 value
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lsb: 24
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reset_value: '0'
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width: 8
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- SDIO_CLKSRC:
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fields: !!omap
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- CLK_SOURCE:
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access: rw
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description: Clock divider source for SD card
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lsb: 0
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reset_value: '0'
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width: 2
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- SDIO_CLKENA:
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fields: !!omap
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- CCLK_ENABLE:
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access: rw
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description: Clock-enable control for SD card clock
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lsb: 0
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reset_value: '0'
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width: 1
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- CCLK_LOW_POWER:
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access: rw
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description: Low-power control for SD card clock
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lsb: 16
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reset_value: '0'
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width: 1
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- SDIO_TMOUT:
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fields: !!omap
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- RESPONSE_TIMEOUT:
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access: rw
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description: Response time-out value
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lsb: 0
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reset_value: '0x40'
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width: 8
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- DATA_TIMEOUT:
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access: rw
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description: Value for card data read time-out
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lsb: 8
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reset_value: '0xffffff'
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width: 24
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- SDIO_CTYPE:
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fields: !!omap
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- CARD_WIDTH0:
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access: rw
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description: Indicates if card is 1-bit or 4-bit
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lsb: 0
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reset_value: '0'
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width: 1
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- CARD_WIDTH1:
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access: rw
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description: Indicates if card is 8-bit
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lsb: 16
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reset_value: '0'
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width: 1
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- SDIO_BLKSIZ:
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fields: !!omap
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- BLOCK_SIZE:
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access: rw
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description: Block size
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lsb: 0
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reset_value: '0x200'
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width: 16
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- SDIO_BYTCNT:
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fields: !!omap
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- BYTE_COUNT:
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access: rw
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description: Number of bytes to be transferred
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lsb: 0
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reset_value: '0x200'
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width: 32
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- SDIO_INTMASK:
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fields: !!omap
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- CDET:
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access: rw
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description: Card detect
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lsb: 0
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reset_value: '0'
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width: 1
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- RE:
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access: rw
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description: Response error
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lsb: 1
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reset_value: '0'
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width: 1
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- CDONE:
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access: rw
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description: Command done
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lsb: 2
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reset_value: '0'
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width: 1
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- DTO:
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access: rw
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description: Data transfer over
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lsb: 3
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reset_value: '0'
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width: 1
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- TXDR:
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access: rw
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description: Transmit FIFO data request
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lsb: 4
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reset_value: '0'
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width: 1
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- RXDR:
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access: rw
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description: Receive FIFO data request
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lsb: 5
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reset_value: '0'
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width: 1
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- RCRC:
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access: rw
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description: Response CRC error
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lsb: 6
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reset_value: '0'
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width: 1
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- DCRC:
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access: rw
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description: Data CRC error
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lsb: 7
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reset_value: '0'
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width: 1
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- RTO:
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access: rw
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description: Response time-out
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lsb: 8
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reset_value: '0'
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width: 1
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- DRTO:
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access: rw
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description: Data read time-out
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lsb: 9
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reset_value: '0'
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width: 1
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- HTO:
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access: rw
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description: Data starvation-by-host time-out/volt_switch_int
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lsb: 10
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reset_value: '0'
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width: 1
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- FRUN:
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access: rw
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description: FIFO underrun/overrun error
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lsb: 11
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reset_value: '0'
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width: 1
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- HLE:
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access: rw
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description: Hardware locked write error
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lsb: 12
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reset_value: '0'
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width: 1
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- SBE:
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access: rw
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description: Start-bit error
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lsb: 13
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reset_value: '0'
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width: 1
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- ACD:
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access: rw
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description: Auto command done
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lsb: 14
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reset_value: '0'
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width: 1
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- EBE:
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access: rw
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description: End-bit error (read)/Write no CRC
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lsb: 15
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reset_value: '0'
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width: 1
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- SDIO_INT_MASK:
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access: rw
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description: Mask SDIO interrupt
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lsb: 16
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reset_value: '0'
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width: 1
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- SDIO_CMDARG:
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fields: !!omap
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- CMD_ARG:
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access: rw
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description: Value indicates command argument to be passed to card
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lsb: 0
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reset_value: '0'
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width: 32
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- SDIO_CMD:
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fields: !!omap
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- CMD_INDEX:
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access: rw
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description: Command index
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lsb: 0
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reset_value: '0'
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width: 6
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- RESPONSE_EXPECT:
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access: rw
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description: Response expect
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lsb: 6
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reset_value: '0'
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width: 1
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- RESPONSE_LENGTH:
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access: rw
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description: Response length
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lsb: 7
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reset_value: '0'
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width: 1
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- CHECK_RESPONSE_CRC:
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access: rw
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description: Check response CRC
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lsb: 8
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reset_value: '0'
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width: 1
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- DATA_EXPECTED:
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access: rw
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description: Data expected
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lsb: 9
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reset_value: '0'
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width: 1
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- READ_WRITE:
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access: rw
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description: Read/write
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lsb: 10
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reset_value: '0'
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width: 1
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- TRANSFER_MODE:
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access: rw
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description: Transfer mode
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lsb: 11
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reset_value: '0'
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width: 1
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- SEND_AUTO_STOP:
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access: rw
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description: Send auto stop
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lsb: 12
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reset_value: '0'
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width: 1
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- WAIT_PRVDATA_COMPLETE:
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access: rw
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description: Wait prvdata complete
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lsb: 13
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reset_value: '0'
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width: 1
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- STOP_ABORT_CMD:
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access: rw
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description: Stop abort command
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lsb: 14
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reset_value: '0'
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width: 1
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- SEND_INITIALIZATION:
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access: rw
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description: Send initialization
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lsb: 15
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reset_value: '0'
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width: 1
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- UPDATE_CLOCK_REGISTERS_ONLY:
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access: rw
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description: Update clock registers only
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lsb: 21
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reset_value: '0'
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width: 1
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- READ_CEATA_DEVICE:
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access: rw
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description: Read CEATA device
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lsb: 22
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reset_value: '0'
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width: 1
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- CCS_EXPECTED:
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access: rw
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description: CCS expected
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lsb: 23
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reset_value: '0'
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width: 1
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- ENABLE_BOOT:
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access: rw
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description: Enable boot
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lsb: 24
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reset_value: '0'
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width: 1
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- EXPECT_BOOT_ACK:
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access: rw
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description: Expect boot acknowledge
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lsb: 25
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reset_value: '0'
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width: 1
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- DISABLE_BOOT:
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access: rw
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description: Disable boot
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lsb: 26
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reset_value: '0'
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width: 1
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- BOOT_MODE:
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access: rw
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description: Boot mode
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lsb: 27
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reset_value: '0'
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width: 1
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- VOLT_SWITCH:
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access: rw
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description: Voltage switch bit
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lsb: 28
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reset_value: '0'
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width: 1
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- START_CMD:
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access: rw
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description: Start command
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lsb: 31
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reset_value: '0'
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width: 1
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- SDIO_RESP0:
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fields: !!omap
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- RESPONSE0:
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access: rw
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description: Bit[31:0] of response
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lsb: 0
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reset_value: '0'
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width: 32
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- SDIO_RESP1:
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fields: !!omap
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- RESPONSE1:
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access: rw
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description: Bit[63:32] of long response
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lsb: 0
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reset_value: '0'
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width: 32
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- SDIO_RESP2:
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fields: !!omap
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- RESPONSE2:
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access: rw
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description: Bit[95:64] of long response
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lsb: 0
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reset_value: '0'
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width: 32
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- SDIO_RESP3:
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fields: !!omap
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- RESPONSE3:
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access: rw
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description: Bit[127:96] of long response
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lsb: 0
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reset_value: '0'
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width: 32
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- SDIO_MINTSTS:
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fields: !!omap
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- CDET:
|
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access: rw
|
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description: Card detect
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lsb: 0
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reset_value: '0'
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width: 1
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- RE:
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access: rw
|
|
description: Response error
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lsb: 1
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reset_value: '0'
|
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width: 1
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- CDONE:
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access: rw
|
|
description: Command done
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lsb: 2
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reset_value: '0'
|
|
width: 1
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- DTO:
|
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access: rw
|
|
description: Data transfer over
|
|
lsb: 3
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reset_value: '0'
|
|
width: 1
|
|
- TXDR:
|
|
access: rw
|
|
description: Transmit FIFO data request
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lsb: 4
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reset_value: '0'
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|
width: 1
|
|
- RXDR:
|
|
access: rw
|
|
description: Receive FIFO data request
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RCRC:
|
|
access: rw
|
|
description: Response CRC error
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- DCRC:
|
|
access: rw
|
|
description: Data CRC error
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- RTO:
|
|
access: rw
|
|
description: Response time-out
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- DRTO:
|
|
access: rw
|
|
description: Data read time-out
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- HTO:
|
|
access: rw
|
|
description: Data starvation-by-host time-out
|
|
lsb: 10
|
|
reset_value: '0'
|
|
width: 1
|
|
- FRUN:
|
|
access: rw
|
|
description: FIFO underrun/overrun error
|
|
lsb: 11
|
|
reset_value: '0'
|
|
width: 1
|
|
- HLE:
|
|
access: rw
|
|
description: Hardware locked write error
|
|
lsb: 12
|
|
reset_value: '0'
|
|
width: 1
|
|
- SBE:
|
|
access: rw
|
|
description: Start-bit error
|
|
lsb: 13
|
|
reset_value: '0'
|
|
width: 1
|
|
- ACD:
|
|
access: rw
|
|
description: Auto command done
|
|
lsb: 14
|
|
reset_value: '0'
|
|
width: 1
|
|
- EBE:
|
|
access: rw
|
|
description: End-bit error (read)/write no CRC
|
|
lsb: 15
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_INTERRUPT:
|
|
access: rw
|
|
description: Interrupt from SDIO card
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_RINTSTS:
|
|
fields: !!omap
|
|
- CDET:
|
|
access: rw
|
|
description: Card detect
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RE:
|
|
access: rw
|
|
description: Response error
|
|
lsb: 1
|
|
reset_value: '0'
|
|
width: 1
|
|
- CDONE:
|
|
access: rw
|
|
description: Command done
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- DTO:
|
|
access: rw
|
|
description: Data transfer over
|
|
lsb: 3
|
|
reset_value: '0'
|
|
width: 1
|
|
- TXDR:
|
|
access: rw
|
|
description: Transmit FIFO data request
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- RXDR:
|
|
access: rw
|
|
description: Receive FIFO data request
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- RCRC:
|
|
access: rw
|
|
description: Response CRC error
|
|
lsb: 6
|
|
reset_value: '0'
|
|
width: 1
|
|
- DCRC:
|
|
access: rw
|
|
description: Data CRC error
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- RTO_BAR:
|
|
access: rw
|
|
description: Response time-out (RTO)/boot ack received (BAR)
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- DRTO_BDS:
|
|
access: rw
|
|
description: Data read time-out (DRTO)/boot data start (BDS)
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- HTO:
|
|
access: rw
|
|
description: Data starvation-by-host time-out
|
|
lsb: 10
|
|
reset_value: '0'
|
|
width: 1
|
|
- FRUN:
|
|
access: rw
|
|
description: FIFO underrun/overrun error
|
|
lsb: 11
|
|
reset_value: '0'
|
|
width: 1
|
|
- HLE:
|
|
access: rw
|
|
description: Hardware locked write error
|
|
lsb: 12
|
|
reset_value: '0'
|
|
width: 1
|
|
- SBE:
|
|
access: rw
|
|
description: Start-bit error
|
|
lsb: 13
|
|
reset_value: '0'
|
|
width: 1
|
|
- ACD:
|
|
access: rw
|
|
description: Auto command done
|
|
lsb: 14
|
|
reset_value: '0'
|
|
width: 1
|
|
- EBE:
|
|
access: rw
|
|
description: End-bit error (read)/write no CRC
|
|
lsb: 15
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_INTERRUPT:
|
|
access: rw
|
|
description: Interrupt from SDIO card
|
|
lsb: 16
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_STATUS:
|
|
fields: !!omap
|
|
- FIFO_RX_WATERMARK:
|
|
access: rw
|
|
description: FIFO reached receive watermark level
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- FIFO_TX_WATERMARK:
|
|
access: rw
|
|
description: FIFO reached transmit watermark level
|
|
lsb: 1
|
|
reset_value: '1'
|
|
width: 1
|
|
- FIFO_EMPTY:
|
|
access: rw
|
|
description: FIFO is empty
|
|
lsb: 2
|
|
reset_value: '1'
|
|
width: 1
|
|
- FIFO_FULL:
|
|
access: rw
|
|
description: FIFO is full
|
|
lsb: 3
|
|
reset_value: '0'
|
|
width: 1
|
|
- CMDFSMSTATES:
|
|
access: rw
|
|
description: Command FSM states
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 4
|
|
- DATA_3_STATUS:
|
|
access: rw
|
|
description: Raw selected card_data[3]
|
|
lsb: 8
|
|
reset_value: ''
|
|
width: 1
|
|
- DATA_BUSY:
|
|
access: rw
|
|
description: Inverted version of raw selected card_data[0]
|
|
lsb: 9
|
|
reset_value: ''
|
|
width: 1
|
|
- DATA_STATE_MC_BUSY:
|
|
access: rw
|
|
description: Data transmit or receive state-machine is busy
|
|
lsb: 10
|
|
reset_value: '1'
|
|
width: 1
|
|
- RESPONSE_INDEX:
|
|
access: rw
|
|
description: Index of previous response
|
|
lsb: 11
|
|
reset_value: '0'
|
|
width: 6
|
|
- FIFO_COUNT:
|
|
access: rw
|
|
description: Number of filled locations in FIFO
|
|
lsb: 17
|
|
reset_value: '0'
|
|
width: 13
|
|
- DMA_ACK:
|
|
access: rw
|
|
description: DMA acknowledge signal
|
|
lsb: 30
|
|
reset_value: '0'
|
|
width: 1
|
|
- DMA_REQ:
|
|
access: rw
|
|
description: DMA request signal
|
|
lsb: 31
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_FIFOTH:
|
|
fields: !!omap
|
|
- TX_WMARK:
|
|
access: rw
|
|
description: FIFO threshold watermark level when transmitting data to card
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 12
|
|
- RX_WMARK:
|
|
access: rw
|
|
description: FIFO threshold watermark level when receiving data from card
|
|
lsb: 16
|
|
reset_value: '0x1f'
|
|
width: 12
|
|
- DMA_MTS:
|
|
access: rw
|
|
description: Burst size of multiple transaction
|
|
lsb: 28
|
|
reset_value: '0'
|
|
width: 3
|
|
- SDIO_CDETECT:
|
|
fields: !!omap
|
|
- CARD_DETECT:
|
|
access: rw
|
|
description: Card detect - 0 represents presence of card
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_WRTPRT:
|
|
fields: !!omap
|
|
- WRITE_PROTECT:
|
|
access: rw
|
|
description: Write protect - 1 represents write protection
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_TCBCNT:
|
|
fields: !!omap
|
|
- TRANS_CARD_BYTE_COUNT:
|
|
access: rw
|
|
description: Number of bytes transferred by CIU unit to card
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 32
|
|
- SDIO_TBBCNT:
|
|
fields: !!omap
|
|
- TRANS_FIFO_BYTE_COUNT:
|
|
access: rw
|
|
description: Number of bytes transferred between host/DMA memory and BIU FIFO
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 32
|
|
- SDIO_DEBNCE:
|
|
fields: !!omap
|
|
- DEBOUNCE_COUNT:
|
|
access: rw
|
|
description: Number of host clocks used by debounce filter logic for card
|
|
detect
|
|
lsb: 0
|
|
reset_value: '0xffffff'
|
|
width: 24
|
|
- SDIO_RST_N:
|
|
fields: !!omap
|
|
- CARD_RESET:
|
|
access: rw
|
|
description: Hardware reset
|
|
lsb: 0
|
|
reset_value: '1'
|
|
width: 1
|
|
- SDIO_BMOD:
|
|
fields: !!omap
|
|
- SWR:
|
|
access: rw
|
|
description: Software reset
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- FB:
|
|
access: rw
|
|
description: Fixed burst
|
|
lsb: 1
|
|
reset_value: '0'
|
|
width: 1
|
|
- DSL:
|
|
access: rw
|
|
description: Descriptor skip length
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 5
|
|
- DE:
|
|
access: rw
|
|
description: SD/MMC DMA enable
|
|
lsb: 7
|
|
reset_value: '0'
|
|
width: 1
|
|
- PBL:
|
|
access: rw
|
|
description: Programmable burst length
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 3
|
|
- SDIO_PLDMND:
|
|
fields: !!omap
|
|
- PD:
|
|
access: rw
|
|
description: Poll demand
|
|
lsb: 0
|
|
reset_value: ''
|
|
width: 32
|
|
- SDIO_DBADDR:
|
|
fields: !!omap
|
|
- SDL:
|
|
access: rw
|
|
description: Start of descriptor list
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 32
|
|
- SDIO_IDSTS:
|
|
fields: !!omap
|
|
- TI:
|
|
access: rw
|
|
description: Transmit interrupt
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RI:
|
|
access: rw
|
|
description: Receive interrupt
|
|
lsb: 1
|
|
reset_value: '0'
|
|
width: 1
|
|
- FBE:
|
|
access: rw
|
|
description: Fatal bus error interrupt
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- DU:
|
|
access: rw
|
|
description: Descriptor unavailable interrupt
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- CES:
|
|
access: rw
|
|
description: Card error summary
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- NIS:
|
|
access: rw
|
|
description: Normal interrupt summary
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- AIS:
|
|
access: rw
|
|
description: Abnormal interrupt summary
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- EB:
|
|
access: rw
|
|
description: Error bits
|
|
lsb: 10
|
|
reset_value: '0'
|
|
width: 3
|
|
- FSM:
|
|
access: rw
|
|
description: DMAC state machine present state
|
|
lsb: 13
|
|
reset_value: '0'
|
|
width: 4
|
|
- SDIO_IDINTEN:
|
|
fields: !!omap
|
|
- TI:
|
|
access: rw
|
|
description: Transmit interrupt enable
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 1
|
|
- RI:
|
|
access: rw
|
|
description: Receive interrupt enable
|
|
lsb: 1
|
|
reset_value: '0'
|
|
width: 1
|
|
- FBE:
|
|
access: rw
|
|
description: Fatal bus error enable
|
|
lsb: 2
|
|
reset_value: '0'
|
|
width: 1
|
|
- DU:
|
|
access: rw
|
|
description: Descriptor unavailable interrupt
|
|
lsb: 4
|
|
reset_value: '0'
|
|
width: 1
|
|
- CES:
|
|
access: rw
|
|
description: Card error summary interrupt
|
|
lsb: 5
|
|
reset_value: '0'
|
|
width: 1
|
|
- NIS:
|
|
access: rw
|
|
description: Normal interrupt summary enable
|
|
lsb: 8
|
|
reset_value: '0'
|
|
width: 1
|
|
- AIS:
|
|
access: rw
|
|
description: Abnormal interrupt summary enable
|
|
lsb: 9
|
|
reset_value: '0'
|
|
width: 1
|
|
- SDIO_DSCADDR:
|
|
fields: !!omap
|
|
- HDA:
|
|
access: rw
|
|
description: Host descriptor address pointer
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 32
|
|
- SDIO_BUFADDR:
|
|
fields: !!omap
|
|
- HBA:
|
|
access: rw
|
|
description: Host buffer address pointer
|
|
lsb: 0
|
|
reset_value: '0'
|
|
width: 32
|